The present invention relates to a decoding apparatus for decoding variable-length coded data, and more particularly, to a high speed variable length decoding apparatus which can enhance processing speed for variable length decoding in a data transmission system which performs signal processing at high frequency.
Generally, systems such as high-definition TVs, high-definition VCRs, digital VCRs, digital camcorders and multimedia equipment, digitally process video and audio information and record or transmit the digitally processed information. The methods which have been proposed for digitally processing video information are prediction coding, orthogonal transform coding, and variable length coding. A typical coding system using these coding techniques performs orthogonal transform coding, quantization and variable length coding with respect to blocks obtained by video partition, in order to effectively compress video information. Also, such a system performs interframe or interfield prediction coding to further increase the data compression rate.
The above-described variable length coding the data compression rate.
The above-described variable length coding apparatus, which compresses information based on frequencies of occurrence of symbols, includes a VLC code table for variable length coding the input symbols. The VLC code table is developed using the Huffman coding technique. As is well known, Huffman coding assigns a shorter code to a symbol having a relatively higher frequency of occurrence and assigns a longer code to a symbol having a relatively lower frequency of occurrence. In the typical coding system, symbols input to the variable length coding apparatus are run, level! symbols which are generally obtained by run-length coding. The run, level! symbols are obtained by a well-known zigzag scan, in which "run" represents the number of successive zeros existing between transformation coefficients which are not zero, and "level" represents a value of the transformation coefficient which is not zero. The variable length coding table designed by the Huffman coding technique is divided into an escape region for symbols in which either "run" or "level" has a relatively very large value and a regular region for the other symbols. Codes in the regular region are assigned to the run, level! symbols according to the Huffman coding technique. Meanwhile, since the run, level! symbols in the escape region statistically have an extremely low frequency of occurrence, an "ESC code" indicating the run, level! symbol of the escape region together with a relatively long code is assigned to the run, level! symbols, respectively. Codewords generated by the variable length coding are transmitted to a decoding system in the form of a bitstream which includes additional information such as an ESC code and an end-of-block (EOB) code indicating a block end.
The decoding system includes a variable length decoder, an inverse quantizer, and an inverse orthogonal transformer, which are used to decode the coded data by performing a reverse procedure of signal processing of the coding system. Referring to FIG. 1 which shows an existing variable length decoding apparatus, variable length coded data is input to a first-in-first-out (FIFO) memory 11 in the form of a serial or parallel bitstream. The FIFO memory 11 stores the input variable length coded data, and outputs the earliest input bit data among the stored data to an interfacer 12 whenever a read signal READ is applied from the interfacer 12. The interfacer 12 separates the data output from the FIFO memory 11 into the variable length coded data and the other additional data based on a start code contained in the data output from the FIFO memory 11. The interfacer 12 outputs data having a predetermined number of bits, for example, 32-bit data, to a barrel shifter 14 in response to a data request signal RQST output from the barrel shifter 14.
The barrel shifter 14 shifts a window of a predetermined size by a code length applied from a code table 15, and outputs data in the shifted window to a run, level! table 15 and the code table 16. The run, level! table 16 outputs a run, level! symbol corresponding to a code contained in the data applied from the barrel shifter 14 to a run, level! decoder 17. The code table 15 uses the data applied from the barrel shifter 14 and outputs a code length corresponding to the run, level! symbol output from the run, level! table 16 to the barrel shifter 14. The barrel shifter 14 outputs the bit data in the window, which has been shifted by the newly applied code length, to the run, level! table 16 and the code table 15. The barrel shifter 14, the run, level! table 16 and the code table 15 repeat the above operation to perform variable length decoding with respect to the data supplied from the interfacer 12.
A sequence controller 13 interrupts the operations of the interfacer 12 and the barrel shifter 14 and resumes the interrupted operations. For this purpose, the sequence controller 13 generates a start signal START or an interrupt signal HOLD in response to parameters obtained from an external control input and the data output from the barrel shifter 14. These signals START and HOLD are applied to the interfacer 12 and the barrel shifter 14.
The run, level! decoder 17 decodes run, level! symbols applied from the run, level! table 16 and outputs the decoded run, level! symbols to an inverse quantizer (IQ) (not shown) and an inverse orthogonal transformer such as an inverse discrete cosine transformer (IDCT) (not shown). Here, the operational timing diagrams of the run, level! decoder 17 are shown in FIGS. 2A through 2C. When run, level! symbols generated from the run, level! table 16 are 5, 3!, 3, 2!, . . . , the run, level! decoder 17 generates zeros of the data of the run-length with respect to the input run, level! symbol and the following level as shown in FIG. 2A, on the basis of the clock pulses shown in FIG. 2B which are generated at a constant clock rate. That is, five zeros are output with respect to the run, level! symbol 5, 3!, and then the level value of 3 is output. Then, three zeros are output with respect to the run, level! symbol 3, 2!, and then the level value of 2 is output. In this case, the run, level! decoder 17 generates a low-level interruption signal HOLDA which interrupts the operation of the barrel shifter 14 during generation of the clock pulses of the number consistent with the runlength. That is, the interruption signal HOLDA of FIG. 2C is generated so that the barrel shifter 14 interrupts the shift operation during generation of the clock pulses of the runlength of 5 with respect to the run, level! symbol 5, 3!. Also, the interruption signal HOLDA of FIG. 2C is generated so that the barrel shifter 14 interrupts the shift operation during generation of the clock pulses of the runlength of 3 with respect to the run, level! symbol 3, 2!.
However, in the above-described existing variable length decoding apparatus, the operation of the barrel shifter 14 is interrupted while zeros from the run, level! decoder 17 are successively outputted. Therefore, the existing variable length decoding apparatus can be used only in a system whose operational speed is not high. Thus, it is difficult to use the existing variable length decoding apparatus in a high speed system such as an HDTV system which should decode more symbols per unit time.